1) digital linear ratemeter
数字线性计数率计
1.
This article introduces the design of digital linear ratemeter.
介绍了数字线性计数率计的E-PLD设计。
3) digital frequency counter
数字频率计
1.
Study and design of adaptive digital frequency counter based on VHDL and FPGA;
基于VHDL和FPGA的自适应数字频率计的研究与设计
2.
The design and simulation of simplified digital frequency counter based on Multisim9.0
基于Multisim9.0简易数字频率计的设计与仿真
3.
By the example of the digital frequency counter design on FPGA, this paper introduces the design of SOC(System On Chip) based on FPGA/CPLD.
通过例举基于FPGA的数字频率计的设计 ,阐述了如何利用FPGA/CPLD实现片上系统。
4) digital cymometer
数字频率计
1.
A 12-bit uniform precision digital cymometer with automatic switching range;
量程自动转换的12位十进制等精度数字频率计
2.
Design of Digital Cymometer Based on VHDL;
基于VHDL的数字频率计设计
3.
Design digital cymometer of using FPGA;
用FPGA设计数字频率计
5) digital power meter
数字功率计
1.
Development of a wide-band digital power meter;
宽带实时数字功率计的研制
6) digital frequency meter
数字频率计
1.
Design of programmability variability range digital frequency meter based on ISP devices;
基于ISP器件的可编程变量程数字频率计的设计研究
2.
This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology.
简述了基于FPGA/CPLD技术的数字频率计的总体设计。
3.
A method and the procedure of the design of digital system are introduced,the digital frequency meter is designed which is based on the ispLSI1016 device of Lattice company.
介绍了采用ISP技术设计数字系统的方法和过程 ,并设计出基于ISP器件的量程自动转换的数字频率
补充资料：不合格百分率计数检验的序贯抽样方案
不合格百分率计数检验的序贯抽样方案
sequential sampling plans for inspection by attributes for percent nonconforming
加hege比ifen.o Jishu Jianvan dex叩uanC伙泪四叩fa叩’On不合格百分率计数检验的序贯抽样方案(se-quenti吐~plingp】川15 for inspection场attributesforpe二ni nonconfo丽ng)逐个地(或成组地)抽取个体，但事先并不固定它们的个数，根据事先规定的规则，直到可以做出接收或拒收批的决定为止。作为代表性的是IEC 1 123:l卯l标准。 设在n.抽试产品中出现;个不合格，且抽样方案给出:，h两数。判决规则如下:①如;n一h〕r，则接收;②如:n一h
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条