Research and Application of ARTiSAN Real-time Studio in the On-board TMR System of CBTC System;

Seamless Reconstruction Method for TMR Computer Based on Micro-package Protocol

In order to enhance the reliability of the SRAM based FPGAs,we have improved the typical TMR(Triple Module Redundance)technology,and designed a partial reconfiguration method which can be used for more than one reconfigurable areas and can tolerate more than one fault.

Research of Synchronization in Triple Modular Redundancy System;

This paper presents the implementation of a distributed triple modular redundancy control system including the choice of system CPU,the implementation of system communication network,system synchronization strategy and the design of TMR output voter.

a kind of repairable system model called triple modular redundancy with non-Markov process is presented, and after expounding work principles, soft and hardware structure, and fault-tolerant properties, reliability analysis for life span is made.

Implementation of Fault - tolerant function is based on the synchronization of three modules in TMR (Triple Module Redundancy)Fault - tolerant server.

The development and accomplishment of a fault-tolerant multiprocessor system which adopted token technology based on general three-module redundancy are presented The critical techniques such as bus arbition,synochronize communication and voting mechanism are introduced,which are very valuable in practical application of some real-time control field requiring high speed and reliabilit

A quasi-TMR system cosists of two basic modules.