1) main controller
主控器
1.
As an appli- cation example, one key mode of the I2C bus of single main controller is specified.
作为一个应用实例,列举了其中一种——单主控器的I2C总线,介绍了这种方式的结构、特性以及程序流程,并对于系统可靠性问题进行了讨论。
2.
This recorder consists ofthe single chip computer AT89c51 as main controller, and the chip of with interface of I~2C bus as periphral device, no-paperrecord of water temperature for warm-water boiler is realized.
本记录仪以AT89C51单片机为主控器，以具有I2C总线接口的芯片为外围器件，实现暖水锅炉水温的无纸记录。
2) master controller
主控器
1.
Design and Implementation of MCU for Master Controller of BS Test;
边界扫描主控器MCU设计与实现
3) master controller
主控制器
1.
The IP Design of The PCI Master Controller;
PCI总线主控制器IP的设计
2.
The master controller and reference converter test device is designed for the test and maintenance of the metro vehicles control system.
地铁列车主控制器及参考值转换器试验台是为列车控制系统检测及维护而研制的测试设备。
3.
Starting with a survey of the function of AAC-000 type language learning system, this paper centers on the composition and relevant circuits of its master controller and audio signal distributor.
本文主要介绍AAC-1000语言学习系统的功用及实现这些功能的主控制器、音频信号分配器的组成及有关电路。
4) main controller
主控制器
1.
The development and technical realization of the main controller unit in the military short-wave radio station are introduced,the software and hardware technique are studied and a new idea of researching the main controller unit is presented.
介绍了短波电台中主控制器单元的发展过程及相应的技术实现,研究了相关软硬件技术,提出了研制主控制器单元的一种新思路。
2.
This paper deals with design and realization of main controller for VSCF.
本文主要是围绕双馈风力发电系统中的主控制器的设计与实现展开的,主要内容如下: 1。
3.
0 IP CORE for USB device controller, and mainly about the design of the Main Controller of the IP CORE.
0设备控制芯片IP核的设计,并且主要对其中的主控制器的设计进行介绍。
5) Host controller
主控制器
1.
In this design, the SOC C8051F020 is used as host controller and host controller communicates with SD card on SPI Bus.
给出一种应用于飞机飞行数据采集仪的SD卡设计方案,该方案选用与8051完全兼容的高性能单片机C8051F020作为主控制器,采用SPI总线与SD卡通信。
2.
0 provides a mechanism that supports full-/low speed devices connected the hub, while transmitting all device data between the host controller and the hub at high-speed.
0提供了一种机制 ,该机制支持在Hub连接的是全 低速设备的情况下 ,主控制器与Hub之间以高速传输所有设备的数
6) JTAG controller
JTAG主控器
1.
In the system, PC works as a platform, the JTAG controller used to generate the boundary scan testing signals is realized by using CPLD chip, and normal SRAM chips is used as the shared memory.
该系统以PC机为平台 ,以用CPLD器件实现的JTAG主控器生成满足IEEE114 9。
2.
Based on the improvement of the processing of IC fabrication, an advanced JTAG controller is presented.
提出了对JTAG主控器的一种改进方法 ,并在逻辑上实现了这一改进 。
补充资料：主控制器
分子式：
CAS号：
性质：串级控制系统的两个控制器中，其被控变量是所要控制的主要变量而其输出作为另一个控制器设定值的控制器。主控制器一般采用PI或PID控制规律。
CAS号：
性质：串级控制系统的两个控制器中，其被控变量是所要控制的主要变量而其输出作为另一个控制器设定值的控制器。主控制器一般采用PI或PID控制规律。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条